Director of Analog

San Jose, California
Semiconductor Engineering – ASIC Engineering /
Full Time /
On-site
Lumotive’s award-winning optical semiconductor solutions enable advanced sensing and perception capabilities in next-generation consumer, mobility, and industrial automation products such as mobile devices, autonomous vehicles, and robots. The company’s patented Light Control Metasurface (LCM™) beam steering chips deliver an unparalleled combination of high performance, exceptional reliability, and low cost — all in a tiny, easily integrated solution. Lumotive has received measurable industry acclaim including Laser Focus World's 2024 Innovators Award; CES Innovation Awards in 2022, 2024, and 2025; Fast Company’s Next Big Thing in Tech 2023; a 2022 SPIE PRISM Award; and a prestigious Edison Award. Investors include Gates Frontier, MetaVC Partners, Quan Funds, Samsung Ventures, and Uniquest.

Job Description:

Lumotive is seeking a highly experienced and hands-on Director of Analog to lead the development of next-generation analog circuitry for Beam steering mixed-signal ASIC controllers. This leadership role is critical in defining and driving the development of active transistor matrix arrays and analog channel driver technologies in close collaboration with optical and ASIC design teams.
You will oversee the full life cycle of mixed-signal IPs—from architecture definition, design, and layout to tape-out, silicon bring-up, and mass production. This role requires a seasoned technical leader with deep domain expertise, exceptional problem-solving skills, and the ability to thrive in a fast-paced, interdisciplinary environment.

You will oversee the full life cycle of mixed-signal IPs—from architecture definition, design, and layout to tape-out, silicon bring-up, and mass production. This role requires a seasoned technical leader with deep domain expertise, exceptional problem-solving skills, and the ability to thrive in a fast-paced, interdisciplinary environment.

Responsibilities:

    • Lead the architecture, design, and development of analog and mixed-signal IPs for beam steering applications.
    • Collaborate with cross-functional teams including optics, digital/ASIC, packaging, and testing to ensure robust integration of analog systems.
    • Drive the design and optimization of key functional blocks such as DACs, ADCs, LDOs, row/column drivers, and output buffers.
    • Oversee simulations, physical implementation, tape-out, and bring-up of mixed-signal ICs.
    • Provide hands-on technical guidance and mentorship to the analog design team.
    • Interface with foundry partners to evaluate and select optimal CMOS process nodes.
    • Ensure successful silicon validation and characterization through lab measurements and debugging.
    • Contribute to the development and execution of the technology roadmap for analog and mixed-signal IP.

Qualifications:

    • PhD or MS in Electrical Engineering or related field with 10+ years of experience in analog and mixed-signal IC design.
    • Proven track record of delivering first-pass functional silicon for complex mixed-signal ASICs, especially in CMOS technologies optimized for image sensors or display drivers.
    • Deep understanding of analog display driver circuits including active-matrix architectures, row/column drivers, DAC/ADC design, LDOs, and output buffers.
    • Strong expertise in low-power, high-precision analog design techniques.
    • Hands-on experience with transistor-level design tools (e.g., Cadence Virtuoso, AMS design flows).
    • In-depth knowledge of process technology and device physics, preferably from leading foundries.
    • Proficiency in lab testing and silicon debugging using oscilloscopes, spectrum analyzers, signal generators, etc.
    • Experience with active-matrix display systems and analog circuit characterization.
    • Exceptional communication skills, both verbal and written, with the ability to present complex technical concepts clearly.
    • Demonstrated leadership in managing and mentoring high-performing analog design teams.
    • Experience in high-volume production and yield optimization of analog/mixed-signal chips.
    • Familiarity with multi-stack die technology, including through-silicon vias (TSVs), wafer-to-wafer bonding, and 3D integration techniques
$200,000 - $230,000 a year
Base pay is scaled depending on experience  + Performance based Quarterly Bonus + Equity. 
Benefits include but not limited to:

Health, dental and vision
FSA, HSA
PTO plus 14 paid company holidays
401K with 3% contribution
Stock Options
Life insurance and disability