PCB Layout Designer (Junior)
Mountain View, CA /
Engineering – Platform Engineering (HW) /
Full-time
/ On-site
We are looking for a junior PCB layout designer who is motivated to learn and take on new challenges in PCB placement, layout, and optimization, under the mentorship of an experienced team.
Responsibilities:
- Component placement and routing
- Footprint and library build up
- PCB technology and material selection
- Stackup definition, power planning, high-speed signal route study with SIPI engineers
- Power constraints
- HSIO constraint manager file generation
- Impedance calculation
- DFM/DFA
- PCB vendor interaction
Requirements:
- Experience with PCB layout tools (Cadence Allegro PCB preferred)
- Basic signal integrity/power integrity knowledge
- Basic thermal/mechanical knowledge
- Good spatial reasoning skills
- Excellent communication skills
- Great team player
- Highly motivated, self driven, and eager to learn
- Experience with Solidworks or other mechanical modeling tools a plus
Education and Experience:
- Technical training in PCB design or a Bachelor’s degree in a related engineering field