Silicon Architecture - Full Time
(US) Mountain View CA , Austin TX, Portland OR, Fort Collins CO /
Engineering – Silicon Engineering /
Positions are open for full-time in the areas of CPU and SOC architecture development.
We are looking for all levels of talent, from entry to advanced level of experience.
- Identify potential areas for improvement while collecting data and measurements that either confirm your ideas or rule them out
- Define new micro-architectures and optimize existing ones
- Collaborate with experienced designers in micro-architecture and RTL to assess the feasibility of ideas, refine ideas, and seed new ones.
- The role requires the analysis of specific workloads across existing and new emerging product categories to identify bottlenecks and opportunities for improvement.
- An interest in AI/ML for architectural exploration or bottleneck identification.
- Collaborate with other architects to maintain and improve the simulation environment and look for ways to boost the productivity of the entire team
- Knowledge or prior experience in one or more of the following areas including ISA development, CPU microarchitecture, security, memory subsystem design, coherency, fabric, SOC architecture, SOC design, DRAM, RAS, or AI/ML for architectural exploration.
- Must be comfortable in an environment of uncertainty and be able to work through ambiguities.
- We empower team members to work collaboratively, so communication, influence, and interpersonal skills are very important.
- Experience with high-level simulators for performance or power estimation is a plus.
- Proficiency in C and C++Proficiency in scripting languages such as Python.
- Knowledge and experience with common performance benchmarks and workloads.
- Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated.
- Ability to work well in a team and be productive under aggressive schedules.
Education and Experience
- PhD, Master’s Degree or Bachelor’s Degree in technical subject area.